A minor performance optimization is on the way to the Linux kernel for roughly two decade old CPUs that have SSE but lack SSE2. Among those CPUs to benefit are the AMD Athlon XP series, some early Sempron models, and some Intel Celeron and Pentium III models.

Open-source developer Yao Zi discovered in the write memory barrier (WMB) code to the Linux kernel for using the SFENCE Instruction it placed a constraint on the processor having SSE2. But the Store Fence (SFENCE) instruction was added in the original SSE, not SSE2. So a one-line patch is now working its way to the mainline kernel to adjust that SFENCE usage so processors with the original Streaming SIMD Extensions can use it rather than just SSE2.

"When adding cc clobber to wmb()'s definition, the alternative() condition to use sfence was incorrectly raised from X86_FEATURE_XMM to X86_FEATURE_XMM2.

Restore the correct constraint for potential better performance on machines without SSE2."

The patch notes the potential for better performance albeit no performance benchmarks were actually done on such aging SSE-only CPUs.

The patch was picked up into tip/tip.git's x86/core Git branch and thus should be merged for the upcoming Linux 7.3 cycle. The patch is also marked for back-porting to existing stable Linux kernel series too.