Last October on Phoronix we were first to point out there being some mysterious intrigue around a new x86 implementation from a "corporate entity other than Intel/AMD" with the developer involved not elaborating on the matter. Now that same developer has posted another semi-cryptic message to the Linux kernel mailing list to talk about 16-tile and 32-tile Advanced Matrix Extensions (AMX) implementations. To date Intel only has 8-tile AMX.

Christian Ludloff has in the past has worked for Google, AMD, TI, and others as an x86 architecture expert and maintainer of the Sandpile.org x86 CPU information site. He was the one that relayed the message last year about an x86 "corporate entity other than Intel/AMD" and today his irregular activity on the Linux kernel mailing list is around larger tile implementations of AMX.

Intel Xeon CPU implementations with Advanced Matrix Extensions (AMX) to date have only featured eight tiles. But now Ludloff is talking about CPUs with 16 tile and 32 tile configurations in the name of increased performance. This is also ahead of AMX's evolution into the next-generation AI Compute Extensions "ACE" for both future AMD and Intel CPUs.

"If x86 AMX/ACE with >8 tiles does not concern you, then you can stop reading.

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I have been asked to document x86 AMX/ACE behavior of 16-tile and 32-tile implementations.

Background
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The goal of a 16-tile or 32-tile HW implementation is to achieve extra performance by running SW that takes advantage of the extra tiles. In particular, said SW is expected to mostly run compute kernels, minimize process switches, and avoid tile usage in interrupt handlers for storage and networking. The use of VMs is possible, but again, rapid switching amongst guests is not a target scenario.
...
An implementation with support for 16 and 32 tiles has been running at large scale for some time."

The mailing list post goes on to document 16-tile and 32-tile implementations of AMX within the confines of the specification. It also goes on to point out various oversights in the AMX and APX and ACE specifications.

Still no word on who has been asking Ludloff to relay these technical details to the public mailing lists.