The Intel graphics compiler code in Mesa 26.3-devel has now enabled the Large GRF mode for Alchemist/DG2 and Battlemage/Xe2 graphics and VRT for Xe3 graphics.

The Large General Register File (GRF) mode on Intel graphics doubles the register space for a single hardware thread from 128 to 256 GRF registers. The Large GRF mode helps in reducing register spilling. More details on the Intel Large GRF support can be found via this Intel.com documentation.

This merge hitting Mesa 26.3-devel Git this weekend enables the large GRF mode for DG2 through Xe2 graphics. Large GRF was already enabled for the IGC / Intel Compute Runtime. The second commit also opens up Xe3 to use 256 GRF registers via the new Variable Register Thread (VRT) functionality where as for DG2 through Xe2 is just the Large GRF feature.